Abstract:

As the performance of networks and processors increases, the performance of the network interface becomes an increasingly significant bottleneck in the overall performance of the parallel or distributed system. The bottleneck persists because it is fundamentally difficult to design and construct network interfaces. We seek to reduce the difficulty by developing a generic network interface template architecture called Cranium. Key aspects of this architecture are hardware support for argument checking, data movement (DMA) and efficient handlers for both short messages and large messages. Cranium provides protected direct access to user-level programs. Cranium is also compatible with networks that may deliver packets out-of-order; there is zero penalty for unordered packets. We introduce the Cranium architecture and describe a related implementation project called ChaosLAN.