TR97-09
EM-Cube: An Architecture for Low-Cost Real-Time Volume Rendering
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- "EM-Cube: An Architecture for Low-Cost Real-Time Volume Rendering", Tech. Rep. TR97-09, Mitsubishi Electric Research Laboratories, Cambridge, MA, August 1997.BibTeX TR97-09 PDF
- @techreport{MERL_TR97-09,
- author = {Randy Osborne, Hanspeter Pfister, Hugh Lauer, Neil McKenzie, Sarah Gibson, Wally Hiatt, Hide Ohkami},
- title = {EM-Cube: An Architecture for Low-Cost Real-Time Volume Rendering},
- institution = {MERL - Mitsubishi Electric Research Laboratories},
- address = {Cambridge, MA 02139},
- number = {TR97-09},
- month = aug,
- year = 1997,
- url = {https://www.merl.com/publications/TR97-09/}
- }
,
- "EM-Cube: An Architecture for Low-Cost Real-Time Volume Rendering", Tech. Rep. TR97-09, Mitsubishi Electric Research Laboratories, Cambridge, MA, August 1997.
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Research Area:
Abstract:
EM-Cube is a VLSI architecture for low-cost, high quality volume rendering at full video frame rates. Derived from the Cube-4 architecture developed at SUNY at Stony Brook, EM-Cube computes sample points and gradients on-the-fly to project 3-dimensional volume data onto 2-dimensional images with realistic lighting and shading. A modest rendering system based on EM-Cube consists of a PCI card with four rendering chips, four 64Mbit SDRAMs to hold the volume data, and four SRAMs to capture the rendered image. The performance target for this configuration is to render images from a 256^3 x 16 bit data set at 30 frames/sec. The EM-Cube architecture can be scaled to larger volume data-sets and/or higher frame rates by adding additional ASICs, SDRAMs, and SRAMs. This paper addresses three major challenges encountered developing EM-Cube into a practical product: exploiting the bandwidth inherent in the SDRAM modules containing the volume data, keeping the pin-count between adjacent ASICs at a tractable level, and reducing the on-chip storage required to hold the intermediate results of rendering.