Abstract:

This paper presents an HDTV video decoder core that is able to decode MPEG-2, MPEG-4 AVC and VC-1 formats and is fully compatible with the Blu-ray Disc standard. The core has two major features which achieve low-cost hardware implementation for three different standards. First, a novel re-configurable architecture is adopted to realize reduced hardware for three different variable length coding tables. A hybrid architecture that consists of a cell array and coefficients memory is introduced. By considering the trade-off between performance and cost, the cell array can compare a variable number of bits in a flexible manner. Second, a data compression method suitable for all video decoding standards is applied to reduce memory data usage and access bandwidth. A compression syntax based on Run-Level encoding with Exp-Golomb tables is used to achieve both low compression workload and reasonable memory cost. The core is implemented by top-down HDL basis approach, and the circuit volume is 1.5Mgates with 90nm CMOS technology and operation clock frequency is 162MHz for 1080i at 30fr/s.